FeRAM retention analysis method based on memory cell read signal voltage measurement

Author

Koike, Hiroki ; Amanuma, Kazushi ; Miwa, Tohru ; Yamada, Junichi ; Toyoshima, Hideo

Author_Institution

Silicon Syst. Res. Labs., NEC Corp., Kanagawa, Japan

Volume

15

Issue

2

fYear

2002

fDate

5/1/2002 12:00:00 AM

Firstpage

201

Lastpage

208

Abstract

A retention analysis method for ferroelectric random access memory (FeRAM) was developed, in which read signal voltages from memory cells are measured. The method uses on-chip sample/hold circuits, an off-chip A/D converter, and memory large-scale integration testing equipment. FeRAM chip retention lifetime can be estimated on the basis of FeRAM read signal voltages after retention periods of one day and upwards. When used as a tool to estimate long-term data retention in FeRAM chips and to analyze fluctuations in memory cell characteristics, this method can provide useful information about FeRAM reliability

Keywords

analogue-digital conversion; ferroelectric storage; integrated circuit reliability; integrated circuit testing; integrated memory circuits; large scale integration; random-access storage; sample and hold circuits; FeRAM chip retention lifetime; FeRAM chips; FeRAM read signal voltages; FeRAM reliability; FeRAM retention analysis method; ferroelectric random access memory; long-term data retention; memory cell characteristics; memory cell read signal voltage measurement; memory cells; memory large-scale integration testing equipment; off-chip A/D converter; on-chip sample/hold circuits; read signal voltages; retention analysis method; retention periods; Circuit testing; Ferroelectric films; Ferroelectric materials; Integrated circuit measurements; Large scale integration; Nonvolatile memory; Random access memory; Semiconductor device measurement; Signal analysis; Voltage;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

0894-6507

Type

jour

DOI

10.1109/66.999593

Filename

999593