Title :
Evaluation of sheet resistance and electrical linewidth measurement techniques for copper damascene interconnect
Author :
Smith, Stewart ; Walton, Anthony J. ; Ross, Alan W S ; Bodammer, Georg K H ; Stevenson, J.T.M.
Author_Institution :
Dept. of Electron. & Electr. Eng., Edinburgh Univ., UK
fDate :
5/1/2002 12:00:00 AM
Abstract :
The effects of the barrier layer and dishing in copper interconnects lead to extra difficulties in measuring sheet resistance (RS) and linewidth when compared with equivalent measurements on nondamascene tracks. This paper examines these issues and presents the results of simulations that quantify the effects of diffusion barrier layers and dishing on the extraction of RS from cross type test structures and the effect this has on linewidth measurement
Keywords :
chemical interdiffusion; chemical mechanical polishing; copper; diffusion barriers; electric resistance; integrated circuit interconnections; integrated circuit measurement; integrated circuit metallisation; integrated circuit modelling; size measurement; CMP; Cu; barrier layer effects; chemical mechanical polishing; copper damascene interconnect; critical dimension; cross type test structures; diffusion barrier layers; dishing; dishing effects; electrical CD metrology; electrical linewidth measurement techniques; linewidth; linewidth measurement; metrology; nondamascene tracks; sheet resistance; sheet resistance measurement techniques; simulations; test structures; van der Pauw method; Aluminum; Conductivity; Copper; Electric resistance; Electrical resistance measurement; Force measurement; Integrated circuit interconnections; Measurement techniques; Metrology; Testing;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
