DocumentCode :
1281008
Title :
Throughput analysis for input-buffered ATM switches with multiple FIFO queues per input port
Author :
Yeung, Kwan L. ; Hai, Shi
Author_Institution :
Dept. of Electron. Eng., City Univ. of Hong Kong, Kowloon Tong, Hong Kong
Volume :
33
Issue :
19
fYear :
1997
fDate :
9/11/1997 12:00:00 AM
Firstpage :
1604
Lastpage :
1606
Abstract :
Using two different packet scheduling policies, the maximum throughputs of an input-buffered ATM switch with m-FIFO queues per input port are derived when the switch size is large
Keywords :
asynchronous transfer mode; electronic switching systems; packet switching; queueing theory; scheduling; input-buffered ATM switches; multiple FIFO queues; packet scheduling policies; throughput analysis;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19971104
Filename :
629582
Link To Document :
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