DocumentCode
1281038
Title
25.6 Gbit/s horizontally and vertically accessible embedded multiport SRAM
Author
Chang, Sunho ; Kim, Jong-Sun ; Bae, Cheon-Ho ; Kim, Lee-Sup
Author_Institution
Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
Volume
35
Issue
21
fYear
1999
fDate
10/14/1999 12:00:00 AM
Firstpage
1823
Lastpage
1825
Abstract
An architecture for an embedded 8-port SRAM with 256 bit simultaneous horizontal and vertical data access for adjacent or alternate addresses is proposed. This architecture makes possible four kinds of address configurations which are effective in video applications by selecting multiple word lines and one of four bit lines for each column multiplexer. The proposed SRAM provides 25.6 Gbit/s of high bandwidth
Keywords
SRAM chips; memory architecture; multiplexing equipment; multiport networks; 25.6 Gbit/s; 256 bit; address configurations; architecture; column multiplexer; embedded multiport SRAM; horizontal data access; multiple word lines; vertical data access; video applications;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19991248
Filename
809994
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