• DocumentCode
    1281100
  • Title

    0.6 μm CMOS, 622/155 Mbit/s ATM-SDH/SONET framer IC

  • Author

    Koziotis, M. ; Birbas, A. ; Theoharis, S.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Patras Univ., Greece
  • Volume
    35
  • Issue
    21
  • fYear
    1999
  • fDate
    10/14/1999 12:00:00 AM
  • Firstpage
    1833
  • Lastpage
    1834
  • Abstract
    An NNI/UNI (node network interface/user network interface) ATM framer ASIC which implements the SDH/SONET based transmission convergence (TC) sublayer of the B-ISDN reference model has been fabricated. The framer chip is suitable for 622.08 or 155.52 Mbit/s line rates. It incorporates 491 K transistors, consumes 2 W of power and has been implemented in 0.6 μm CMOS technology
  • Keywords
    CMOS digital integrated circuits; 0.6 micron; 155 Mbit/s; 2 W; 622 Mbit/s; B-ISDN reference model; CMOS ATM-SDH/SONET framer IC; NNI/UNI ATM framer ASIC; node network interface; submicron CMOS technology; transmission convergence sublayer; user network interface;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19991254
  • Filename
    810001
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1281100