DocumentCode
1281709
Title
On-chip matched 5.2 and 5.8 GHz differential LNAs fabricated using 0.35 μm CMOS technology
Author
Runge, K. ; Pehlke, D. ; Schiffer, B.
Author_Institution
Rockwell Sci. Center, Thousand Oaks, CA, USA
Volume
35
Issue
22
fYear
1999
fDate
10/28/1999 12:00:00 AM
Firstpage
1899
Lastpage
1900
Abstract
The authors have designed experimental 5.2 and 5.8 GHz low-noise amplifiers (LNAs) using 0.35 μm CMOS technology. The ICs feature on-chip matching to 50 Ω, differential operation, and open drain output buffers. A return loss of better than -15 dB was achieved for both amplifiers. LC parallel resonant loads were used to form the gain peak. The LNAs had a measured noise figure of 4 to 5 dB, at VSS=3.3 V
Keywords
CMOS analogue integrated circuits; MMIC amplifiers; differential amplifiers; impedance matching; integrated circuit noise; wireless LAN; -3.3 V; 0.35 micron; 4 to 5 dB; 5.2 GHz; 5.8 GHz; CMOS technology; LC parallel resonant loads; differential LNAs; differential operation; gain peak; low-noise amplifiers; noise figure; on-chip matching; open drain output buffers; return loss;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19991350
Filename
811037
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