• DocumentCode
    1282025
  • Title

    Stress-voiding of narrow conductor lines

  • Author

    Yost, F.G. ; Campbell, F.E.

  • Author_Institution
    Sandia Nat. Lab., Albuquerque, NM, USA
  • Volume
    6
  • Issue
    3
  • fYear
    1990
  • fDate
    5/1/1990 12:00:00 AM
  • Firstpage
    40
  • Lastpage
    44
  • Abstract
    The growth of voids in conductor lines that have no applied voltage nor imposed thermal or concentration gradients is examined. Such voids can cause narrow aluminium conductors in silicon ICs to fail spontaneously. Recent attempts to describe void growth mathematically as a stress-driven diffusive phenomenon are reviewed, and an expression for the time dependent void size is derived. The equation is used to explore the many variables of the void-growth problem.<>
  • Keywords
    aluminium; circuit reliability; failure analysis; grain boundary diffusion; integrated circuit technology; metallisation; Al conductor failure; ICs; Monte Carlo analysis; Si integrated circuits; failure model; grain boundaries; narrow conductor lines; stress voiding; stress-driven diffusive phenomenon; time dependent void size; void growth; Aluminum; Capacitive sensors; Chemicals; Circuit testing; Conductors; Passivation; Silicon; Temperature; Tensile stress; Thermal stresses;
  • fLanguage
    English
  • Journal_Title
    Circuits and Devices Magazine, IEEE
  • Publisher
    ieee
  • ISSN
    8755-3996
  • Type

    jour

  • DOI
    10.1109/101.55334
  • Filename
    55334