Oversampling parallel delta-sigma modulator A/D conversion

Conventional delta-sigma analog-to-digital converters (ΔΣADC´s) are widely used in low-bandwidth applications such as high-fidelity audio processing because they offer high-precision conversion yet are amenable to implementation using fine-line VLSI processes optimized for digital circuitry. However, their oversampling requirement so far has prevented their widespread application to higher bandwidth applications such as video processing. This paper extends a recently developed delta-sigma ADC architecture called the pi-delta-sigma ADC (ΠΔΣADC) that consists of multiple ΔΣ modulator channels operating in parallel without time-interleaving. The extension developed in this paper allows for oversampling to be combined with parallelism such that an M-channel system with an oversampling ratio of N can achieve a conversion performance close to that of a conventional ΔΣADC with an oversampling ratio of M×N. Thus, for a given conversion precision, the architecture offers relaxed oversampling relative to conventional ΔΣADCs in return for increased analog circuit area. Moreover, as will be shown, the ΠΔΣADC retains much of the robustness of conventional ΔΣADC´s with respect to nonideal circuit behavior