Title :
Problems in designing thin-film accumulation-mode p-channel SOI MOSFETs for CMOS digital circuit environment
Author_Institution :
Centro Nacional de Microelectronica, Campus Univ. Autonoma de Barcelona, Bellaterra, Spain
fDate :
7/4/1991 12:00:00 AM
Abstract :
A back-accumulation conduction mechanism ignored in previously-published analyses is shown to be the prime factor in the definition of the threshold voltage of the thin-film accumulation-mode p-channel SOI MOSFET when the device is integrated in a typical digital circuit environment. A new formulation which overcomes this problem is presented, then used to discuss problems of a tradeoff between film doping and threshold voltage as a function of other technological parameters.
Keywords :
CMOS integrated circuits; digital integrated circuits; insulated gate field effect transistors; semiconductor device models; thin film transistors; CMOS digital circuit environment; SOI MOSFETs; TFT; back-accumulation conduction mechanism; film doping; p-channel; thin-film accumulation-mode; threshold voltage;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19910802
