A New Quasi-2-D Threshold Voltage Model for Short-Channel Junctionless Cylindrical Surrounding Gate (JLCSG) MOSFETs

Author

Chiang, Te-Kuang

Author_Institution

Electr. Eng. Dept., Nat. Univ. of Kaohsiung, Kaohsiung, Taiwan

Volume

59

Issue

11

fYear

2012

Firstpage

3127

Lastpage

3129

Abstract

Based on the quasi-2-D scaling equation, a new threshold voltage model for short-channel junctionless (JL) cylindrical surrounding gate (JLCSG) MOSFETs is developed. The model explicitly shows how the device parameters such as the silicon thickness, oxide thickness, drain bias, and channel length affect the threshold voltage behavior. The model can also be extendable to its counterpart of junction-based cylindrical surrounding gate (JBCSG) MOSFETs. The model is verified by its calculated results matching well with those of the 3-D numerical simulator and can be easily used to explore the threshold voltage characteristics of JLCSG MOSFETs for its simple formula and computational efficiency.

Keywords

MOSFET; JLCSG MOSFET; channel length; drain bias; oxide thickness; quasi-2D scaling equation; quasi-2D threshold voltage model; short-channel junctionless cylindrical surrounding gate MOSFET; silicon thickness; Electric potential; Logic gates; MOSFETs; Mathematical model; Semiconductor device modeling; Threshold voltage; JL cylindrical surrounding gate (JLCSG) MOSFETs; Junctionless (JL) cylindrical; quasi-2-D scaling equation; threshold voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2012.2212904

Filename

6298950