Tapered Through-Silicon-Via Interconnects for Wafer-Level Packaging of Sensor Devices

Author

Leib, Jüergen ; Bieck, Florian ; Hansen, Ulli ; Looi, Kok-Kheong ; Ngo, Ha-Duong ; Seidemann, Volker ; Shariff, Dzafir ; Studzinski, Daniel ; Suthiwongsunthorn, Nathapong ; Tan, Kenneth ; Wilke, Ralph ; Yam, Kwong-Loon ; Töpper, Michael

Author_Institution

Schott Adv. Packaging, Singapore, Singapore

Volume

33

Issue

3

fYear

2010

Firstpage

713

Lastpage

721

Abstract

Through-silicon-via (TSV) interconnects using the “via-last” approach are successfully applied for wafer-level packaging of complementary metal-oxide-semiconductor (CMOS) image sensors. Standard materials and processes are applied for redistribution on the backside of the devices, which is enabled by the use of plasma etched vias with tapered sidewalls. With this, high reliability for the packaged devices are achieved on component and board level. Based on the high uniformity for the via geometry in respect to the dimension of top opening, bottom opening, and sidewall angle, we discuss the coverage of those redistribution polymers and photo resists as the bases for high performance and high yield of the mature wafer-level packaging process for optical and M(O)EMS devices.

Keywords

CMOS image sensors; integrated circuit interconnections; micro-optomechanical devices; micromechanical devices; photoresists; sputter etching; wafer level packaging; CMOS image sensor; MEMS device; MOEMS device; complementary metal oxide semiconductor image sensor; photoresists; plasma etched via; redistribution polymers; sensor devices; tapered through-silicon-via interconnects; wafer level packaging; CMOS image sensors; Coatings; Etching; Image sensors; Optical devices; Optical polymers; Packaging; Plasma applications; Plasma devices; Plasma materials processing; Plasmas; Plastics; Resists; Silicon; Through-silicon vias; Wafer scale integration; Charge-coupled device (CCD); complementary metal–oxide–semiconductor (CMOS) integrated circuits; glass; image sensors; microelectromechanical systems (MEMS); plasma materials-processing applications; wafer bonding; wafer-scale integration;

fLanguage

English

Journal_Title

Advanced Packaging, IEEE Transactions on

Publisher

ieee

ISSN

1521-3323

Type

jour

DOI

10.1109/TADVP.2009.2026950

Filename

5536911