• DocumentCode
    1284368
  • Title

    Limitations of LDD types of structures in deep-submicrometer MOS technology

  • Author

    Tasch, Al F. ; Shin, H. ; Bordelon, T.J. ; Maziar, Christine M.

  • Author_Institution
    Microelectron. Res. Center, Texas Univ., Austin, TX, USA
  • Volume
    11
  • Issue
    11
  • fYear
    1990
  • Firstpage
    517
  • Lastpage
    519
  • Abstract
    Lightly doped drain (LDD) types of MOSFET structures have been analyzed in detail in order to understand the issues and trade-offs in the application of these structures to deep-submicrometer technology (L/sub gate/>
  • Keywords
    VLSI; hot carriers; insulated gate field effect transistors; semiconductor technology; 0.35 micron; LDD types of structures; MOSFET structures; N/sup -/ region; VLSI; applicability of LDD MOSFETs; channel doping compensation; charge-sharing effects; conflict in design requirements; deep-submicrometer MOS technology; deep-submicrometer technology; gate length; graded-drain profile; hot-carrier generation; limitations; reduction of hot-carrier effects; scaling; submicron MOS technology; suppression of charge sharing; trade-offs; Degradation; Doping profiles; FETs; Hot carrier effects; Hot carriers; Implants; MOSFET circuits; Manufacturing; Predictive models; Temperature distribution;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/55.63018
  • Filename
    63018