DocumentCode :
128689
Title :
A full-integrated LVDS transceiver in 0.5µm CMOS technology
Author :
Yong Xu ; Tiquan Sun ; Fei Zhao ; Cheng Hu
Author_Institution :
PLA Univ. of Sci. & Technol., Nanjing, China
fYear :
2014
fDate :
9-11 June 2014
Firstpage :
1672
Lastpage :
1675
Abstract :
The paper presents the design and implementation of input/output interface circuits, fully compatible with low-voltage differential signal (LVDS) standard. Due to the low voltage differential transmission technique, the low power consumption and high transmission speed are achieved at the same time. The transmitter is implemented by a closed-loop control circuit and an internal bandgap voltage reference, the receiver is implemented by means of a dual-gain stage folded cascode architecture. The transceiver is fabricated in 3.3v and 5v compatibly, 0.5μm CMOS technology. The maximum transmission speed is up to 800Mbps and quiescent current is only 5mA.
Keywords :
CMOS integrated circuits; closed loop systems; reference circuits; transceivers; CMOS technology; closed-loop control circuit; current 5 mA; dual-gain stage folded cascode architecture; full-integrated LVDS transceiver; high transmission speed; input-output interface circuits; internal bandgap voltage reference; low power consumption; low voltage differential transmission technique; low-voltage differential signal standard; size 0.5 mum; voltage 3.3 V; voltage 5 V; CMOS integrated circuits; CMOS technology; Conferences; Electrostatic discharges; Receivers; Transceivers; Transmitters; CMOS; LVDS; integrated circuit; transceiver;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Electronics and Applications (ICIEA), 2014 IEEE 9th Conference on
Conference_Location :
Hangzhou
Print_ISBN :
978-1-4799-4316-6
Type :
conf
DOI :
10.1109/ICIEA.2014.6931436
Filename :
6931436
Link To Document :
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