3510-V 390- $\hbox {m}\Omega \cdot\hbox {cm}^{2}$ 4H-SiC Lateral JFET on a Semi-Insulating Substrate

The performance of high-voltage 4H-SiC lateral JFETs on a semi-insulating substrate is reported in this letter. The design of the voltage-supporting layers is based on the charge compensation of p- and n-type epilayers. The best measured breakdown voltage is 3510 V, which, to the authors´ knowledge, is the highest value ever reported for SiC lateral switching devices. The R_on of this device is 390 m????cm², in which 61% is due to the drift-region resistance. The BV²/R_on is 32 MW/cm², which is typical among other reported SiC lateral devices.