DocumentCode
1286992
Title
Scaling in npn and pnp heterostructure bipolar transistors
Author
Shepard, K. ; Schumacher, H.
Author_Institution
Bell Commun. Res. Inc., Red Bank, NJ, USA
Volume
24
Issue
2
fYear
1988
fDate
1/21/1988 12:00:00 AM
Firstpage
111
Lastpage
112
Abstract
Calculating the cutoff frequency f T of bipolar transistors from the emitter-to-collector delay neglects the heavy influence of parasitic reactances on the frequency response of realistic transistors. A more complete equivalent circuit modelling reveals that the speed advantage of npn against pnp heterojunction bipolar transistors of common geometry, base width, and doping profile decreases as the transistor is scaled up in size. For power applications, the f T of InP/GaInAs pnp devices may even surpass that of npn transistors
Keywords
III-V semiconductors; bipolar transistors; equivalent circuits; gallium arsenide; indium compounds; power transistors; semiconductor device models; solid-state microwave devices; HBT; InP-GaInAs transistors; cutoff frequency; equivalent circuit modelling; frequency response; heterostructure bipolar transistors; npn transistors; parasitic reactances; pnp transistors; power transistors; scaling up; semiconductors; speed advantage of npn;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
Filename
5541
Link To Document