• DocumentCode
    1287089
  • Title

    A study of the internal device dynamics of punch-through and nonpunch-through IGBTs under zero-current switching

  • Author

    Elasser, Ahmed ; Parthasarathy, Vijay ; Torrey, David A.

  • Author_Institution
    Dept. of Electr. Power Eng., Rensselaer Polytech. Inst., Troy, NY, USA
  • Volume
    12
  • Issue
    1
  • fYear
    1997
  • fDate
    1/1/1997 12:00:00 AM
  • Firstpage
    21
  • Lastpage
    35
  • Abstract
    The effective use of power insulated gate bipolar transistors (IGBTs) requires a good understanding of their internal device physics. This understanding is essential for the optimal interaction among the IGBTs, their snubber elements and the power circuit in which the IGBTs operate. As switching frequencies are pushed to higher values, switching loss reduction becomes an essential part of the design and optimization process. Soft switching techniques such as zero-voltage switching (ZVS) and zero-current switching (ZCS) are widely used for this purpose. This study provides an insight into the internal dynamic behavior of IGBTs under zero-current switching. The latter is accomplished through mixed-mode simulation, providing the necessary insight for the improvement of circuit and device performance. In particular, the authors have analyzed the behavior of the negative current in nonpunch-through (NPT) devices after the first zero-current crossing and the effect of the turn-off delay on the tail current. They have also experimentally characterized punch-through (PT) and NPT IGBTs to confirm the insights provided by the mixed-mode simulation
  • Keywords
    bipolar transistor switches; insulated gate bipolar transistors; power bipolar transistors; power semiconductor switches; semiconductor device models; semiconductor device testing; switching circuits; internal device dynamics; internal dynamic behavior; mixed-mode simulation; negative current behaviour; nonpunch-through transistors; power IGBTs; punch-through transistors; snubber elements; switching loss reduction; zero-current switching; Circuits; Design optimization; Insulated gate bipolar transistors; Physics; Process design; Snubbers; Switching frequency; Switching loss; Zero current switching; Zero voltage switching;
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0885-8993
  • Type

    jour

  • DOI
    10.1109/63.554166
  • Filename
    554166