Title :
Digital frequency modulation profile for low jitter spread spectrum clock generator
Author :
Byun, Sangjin ; Son, Chung
Author_Institution :
Dept. of Electron. Eng., Dongguk Univ., Seoul, South Korea
Abstract :
A new digital frequency modulation profile is presented for the design of a low jitter spread spectrum clock generator (SSCG). By using this proposed frequency modulation profile, the clock jitter due to frequency modulation can be significantly reduced. Simulation shows that the jitter is reduced from 0.29 to 0.065UI if the proposed frequency modulation profile is adopted. For the simulation, a 40-90-MHz SSCG with 1% of modulation ratio and 500-kHz of modulation frequency was designed in a 0.18 μm 1P4M CMOS process.
Keywords :
CMOS integrated circuits; frequency modulation; synchronisation; timing jitter; CMOS process; SSCG; clock jitter; digital frequency modulation; frequency 40 MHz to 90 MHz; spread spectrum clock generator;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2010.0870
