DocumentCode
1288082
Title
40 Gbit/s 1:4 demultiplexer IC using InP-based heterojunction bipolar transistors
Author
Sano, E. ; Nakajima, H. ; Watanabe, N. ; Yamahata, S. ; Ishii, Y.
Author_Institution
NTT Network Innovation Labs., Kanagawa, Japan
Volume
35
Issue
24
fYear
1999
fDate
11/25/1999 12:00:00 AM
Firstpage
2116
Lastpage
2117
Abstract
A 40 Gbit/s 1:4 demultiplexer IC with a power dissipation of 2.97 W has been successfully fabricated using reliable, non-selfaligned, InP-based heterojunction bipolar transistors (HBTs) with a carbon-doped base and InGaAs/InP composite-collector. This is the first demonstration of all bipolar transistor 1:4 demultiplexers operating at such a high bit rate
Keywords
III-V semiconductors; bipolar digital integrated circuits; demultiplexing equipment; gallium arsenide; indium compounds; optical communication equipment; optical fibre communication; time division multiplexing; 2.97 W; 40 Gbit/s; InP; TDM; bit rate; demultiplexer IC; heterojunction bipolar transistors; nonselfaligned InP-based HBTs; optical communication equipment; optical fibre transmission; power dissipation;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19991408
Filename
815929
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