• DocumentCode
    1288123
  • Title

    Inspection of the Current-Mirror Mismatch by Secondary Electron Potential Contrast With In Situ Nanoprobe Biasing

  • Author

    Po-Tsun Liu ; Jeng-Han Lee

  • Author_Institution
    Dept. of Photonics, Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • Volume
    32
  • Issue
    10
  • fYear
    2011
  • Firstpage
    1418
  • Lastpage
    1420
  • Abstract
    The mismatch mechanism in a current mirror consisting of laterally diffused p-channel MOS (LDPMOS) technology was investigated using a scanning electron microscope (SEM) with in situ nanoprobing. The electrical measurement found a saturation current mismatch of 52 μA between the LDPMOS transistors. Furthermore, the proposed inspection identified successfully 0.4-μm p-well layer misalignment, which was the root cause of the mismatch. This letter demonstrates that an in situ nanoprobing system is a powerful tool for enhancing p-well dopant contrast in a SEM, analyzing site-specific failures, and studying device physics under a dynamic scope.
  • Keywords
    MOSFET; electric variables measurement; failure analysis; inspection; scanning electron microscopy; LDPMOS transistors; SEM; current 52 muA; current-mirror mismatch inspection; electrical measurement; in situ nanoprobe biasing; laterally diffused p-channel MOS technology; p-well dopant contrast enhancement; p-well layer misalignment; scanning electron microscope; secondary electron potential contrast; site-specific failure analysis; size 0.4 mum; Electric potential; Inspection; Logic gates; Mirrors; Scanning electron microscopy; Silicon; Transistors; Current mirror; laterally diffused p-channel metal–oxide–semiconductor (LDPMOS); nanoprobing; secondary electron potential contrast (SEPC);
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2011.2161567
  • Filename
    5970080