• DocumentCode
    1288246
  • Title

    Very high density trench gate power MOSFET using simplified four-mask process

  • Author

    Nam, K.S. ; Lee, Jae W. ; Kim, S.-G. ; Roh, T.M. ; Koo, J.G. ; Cho, K.I.

  • Author_Institution
    Microelectron. Technol. Lab., Electron. & Telecommun. Res. Inst., Taejeon, South Korea
  • Volume
    35
  • Issue
    24
  • fYear
    1999
  • fDate
    11/25/1999 12:00:00 AM
  • Firstpage
    2149
  • Lastpage
    2150
  • Abstract
    A new and simplified process for fabricating a high density n-channel trench gate power MOSFET using four mask layers and a sidewall spacer technique is proposed. Use of this process has enabled a remarkably increased high density (100 Mcell/in2) trench MOSFET with a cell pitch of 2.5 μm to be realised. Furthermore, the p-base, n-source, and trench gate regions were formed by the same mask layer, which made it possible to reduce the number of processing steps. The fabricated device had a low specific on-resistance of 0.7 mΩcm 2 with a breakdown voltage of 46 V
  • Keywords
    power MOSFET; 2.5 micron; 46 V; breakdown voltage; fabrication; four-mask process; high density n-channel trench gate power MOSFET; sidewall spacer; specific on-resistance;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19991440
  • Filename
    815951
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1288246