A unified circuit model for ferroelectrics

Author

Auluck, Kshitij ; Kan, Edwin C. ; Rajwade, Shantanu R.

Author_Institution

Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA

fYear

2014

fDate

9-11 Sept. 2014

Firstpage

149

Lastpage

152

Abstract

We present a physical circuit model for polarization reversal dynamics in ferroelectrics, which is implemented in Verilog-A, validated with PZT measurements and applicable in all operation modes for bulk, epitaxial and polycrystalline thin films. Consistent treatment of field-driven polarization not only gives accurate step-voltage responses across many decades in time, but also reproduces frequency and amplitude dependent P-E and I-V hysteresis loops for ferroelectric MIM capacitors. FE-RAM and gate-stack FE-FET circuit simulations are experimentally verified.

Keywords

MIM devices; ferroelectric capacitors; random-access storage; thin films; FE-RAM; I-V hysteresis loops; P-E hysteresis loops; PZT measurements; Verilog-A; bulk thin films; epitaxial thin films; ferroelectric MIM capacitors; field-driven polarization; gate-stack FE-FET circuit simulations; operation modes; physical circuit model; polarization reversal dynamics; polycrystalline thin films; step-voltage responses; unified circuit model; Hysteresis; Integrated circuit modeling; Iron; Solid modeling; Switches; Switching circuits; Transient analysis; FE-FET; PZT; compact model; ferroelectric;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices (SISPAD), 2014 International Conference on

Conference_Location

Yokohama

ISSN

1946-1569

Print_ISBN

978-1-4799-5287-8

Type

conf

DOI

10.1109/SISPAD.2014.6931585

Filename

6931585