DocumentCode
1288640
Title
A CMOS True Single-Phase-Clock Divider With Differential Outputs
Author
Chang, Chih-Wei ; Chen, Yi-Jan Emery
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
19
Issue
12
fYear
2009
Firstpage
813
Lastpage
815
Abstract
This letter presents a true single-phase-clock (TSPC) divider that takes a single-ended input signal while producing differential outputs. The differential outputs are generated by properly coupling the waveforms of two TSPC dividers. Implemented using TSMC 0.18 mum CMOS technology, the divider is capable of operating from 0.6 to 5 GHz. The phase deviation and amplitude difference of the differential outputs are less than 1.7 degree and 0.41%, respectively, below 3 GHz. The core circuit size of the TSPC divider is 160 mum times 215 mum.
Keywords
CMOS integrated circuits; dividing circuits; field effect MMIC; CMOS true single-phase-clock divider; TSMC CMOS technology; differential outputs; frequency 0.6 GHz to 5 GHz; single-ended input signal; size 0.18 mum; CMOS technology; Clocks; Coupling circuits; Frequency conversion; Integrated circuit layout; Integrated circuit noise; Phase locked loops; Resistors; Signal generators; Voltage; CMOS; divider; true single phase clock (TSPC);
fLanguage
English
Journal_Title
Microwave and Wireless Components Letters, IEEE
Publisher
ieee
ISSN
1531-1309
Type
jour
DOI
10.1109/LMWC.2009.2033523
Filename
5320187
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