DocumentCode :
12887
Title :
Design and Evaluation of Reduced Self-Capacitance Inductor in DC/DC Converters with Fast-Switching SiC Transistors
Author :
Zdanowski, Mariusz ; Kostov, Konstantin ; Rabkowski, Jacek ; Barlik, Roman ; Nee, H.-P.
Author_Institution :
Inst. of Control & Ind. Electron., Warsaw Univ. of Technol., Warsaw, Poland
Volume :
29
Issue :
5
fYear :
2014
fDate :
May-14
Firstpage :
2492
Lastpage :
2499
Abstract :
The paper presents an inductor with reduced self-capacitance, designed and evaluated with fast-switching SiC transistors in dc-dc converters. A conventional inductor with the same core and number of turns was also build for comparison. The two inductors are tested experimentally on two different 2 kW, 100 kHz dc-dc converters with silicon carbide switches-one with a junction field-effect transistor (JFET) and the other with a bipolar junction transistor (BJT). Replacing the conventional inductor with the one that has lower self-capacitance improved the switching performance of the converter and reduced its electromagnetic emissions. Furthermore, the efficiency of the converter is improved-in the case of the JFET boost converter the power losses were reduced by 16% and by 20% in the case of BJT.
Keywords :
DC-DC power convertors; bipolar transistors; electromagnetic interference; field effect transistors; inductors; silicon compounds; wide band gap semiconductors; BJT; DC-DC converters; JFET boost converter; SiC; bipolar junction transistor; electromagnetic emissions; fast-switching transistors; junction field effect transistor; power 2 kW; reduced self-capacitance inductor; Inductors; JFETs; Parasitic capacitance; Silicon carbide; Switches; Electromagnetic interference; inductors; junction field-effect transistors (JFETs); parasitic capacitance; silicon carbide (SiC);
fLanguage :
English
Journal_Title :
Power Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0885-8993
Type :
jour
DOI :
10.1109/TPEL.2013.2281990
Filename :
6601631
Link To Document :
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