A 3-V 5.4-mW BiCMOS track & hold circuit with sampling frequency up to 150 MHz

Author

Schillaci, Luca ; Baschirotto, Andrea ; Castello, Rinaldo

Author_Institution

Dipt. di Elettronica, Pavia Univ., Italy

Volume

32

Issue

7

fYear

1997

fDate

7/1/1997 12:00:00 AM

Firstpage

926

Lastpage

932

Abstract

A track & hold circuit to be used in front of a high-speed analog-to-digital converter (ADC) is proposed. In order to achieve the required resolution with a single 3-V supply, a fully differential closed-loop architecture is used. The track & hold circuit processes a differential 1-Vpp output signal swing and achieves more than 8-b linearity with sampling frequency up to 150 MHz. In these conditions, the total power consumption is 5.4 mW from a single 3-V supply. The circuit has been realized in a 0.7 μm BiCMOS technology, and its active area is about 0.15 mm²

Keywords

BiCMOS analogue integrated circuits; analogue processing circuits; analogue-digital conversion; closed loop systems; sample and hold circuits; 0.7 micron; 3 V; 5.4 mW; BiCMOS; active area; differential output signal swing; fully differential closed-loop architecture; high-speed analog-to-digital converter; resolution; sampling frequency; total power consumption; track & hold circuit; Analog-digital conversion; BiCMOS integrated circuits; Clocks; Energy consumption; Frequency conversion; Sampling methods; Signal processing; Signal resolution; Switches; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.597282

Filename

597282