DocumentCode :
1289678
Title :
Efficient digital filtering architectures using pipelining/interleaving
Author :
Jiang, Zhongnong, Jr. ; Willson, Alan N., Jr.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume :
44
Issue :
2
fYear :
1997
fDate :
2/1/1997 12:00:00 AM
Firstpage :
110
Lastpage :
119
Abstract :
A pipelining/interleaving (PI) technique is developed for efficient digital filtering. By using a clock rate that is K times the data rate and with interleaved feedback of the output samples, a single expanded digital filter H(zK) can be made equivalent to a cascade of k identical filters Hk(z) 1⩽k⩽K. The PI technique is used for designing Kalser-Hamming sharpened linear-phase FIR filters with very high performance. It can also be applied in efficient IIR filtering to alleviate the critical-loop limitation on system clock rates. Furthermore, the PI technique is applicable to designing efficient multirate signal processing systems
Keywords :
FIR filters; IIR filters; circuit feedback; digital filters; filtering theory; pipeline processing; signal processing; IIR filtering; Kalser-Hamming sharpened filter; clock rate; critical-loop limitation; digital filtering architectures; interleaved feedback; linear-phase FIR filters; multirate signal processing systems; pipelining/interleaving; single expanded digital filter; Clocks; Digital filters; Filtering; Finite impulse response filter; IIR filters; Interleaved codes; Output feedback; Pipeline processing; Signal design; Signal processing;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.554438
Filename :
554438
Link To Document :
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