Title :
High-voltage devices for 0.5-μm standard CMOS technology
Author :
Bassin, C. ; Ballan, H. ; Declercq, M.
Author_Institution :
Electron. Lab., Swiss Fed. Inst. of Technol., Lausanne, Switzerland
Abstract :
The feasibility of the smart voltage extension (SVX) technique featuring complementary high-voltage devices without any modifications of the process steps of an 0.5-μm standard CMOS technology is discussed here. This letter focuses on the optimization of the breakdown voltage of the HVNMOS as well as the possible implementation of the HVPMOS. Different high-voltage options with increasing process modification steps are discussed as a function of the required high-voltage capabilities.
Keywords :
CMOS integrated circuits; power MOSFET; power integrated circuits; semiconductor device breakdown; 0.5 mum; CMOS technology; HVNMOS; HVPMOS; breakdown voltage optimization; complementary high-voltage devices; high-voltage devices; process modification steps; smart voltage extension technique; CMOS technology; Current density; Doping; Electrons; Electrostatics; Immune system; MOSFETs; Silicon;
Journal_Title :
Electron Device Letters, IEEE
