DocumentCode :
129104
Title :
Impact of steep-slope transistors on non-von Neumann architectures: CNN case study
Author :
Palit, Indranil ; Sedighi, Behnam ; Horvath, Andras ; Hu, Xiaobo Sharon ; Nahas, Joseph ; Niemier, Michael
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of Notre Dame, Notre Dame, IN, USA
fYear :
2014
fDate :
24-28 March 2014
Firstpage :
1
Lastpage :
6
Abstract :
A Cellular Neural Network (CNN) is a highly-parallel, analog processor that can significantly outperform von Neumann architectures for certain classes of problems. Here, we show how emerging, beyond-CMOS devices could help to further enhance the capabilities of CNNs, particularly for solving problems with non-binary outputs. We show how CNNs based on devices such as graphene transistors - with multiple steep current growth regions separated by negative differential resistance (NDR) in their I-V characteristics - could be used to recognize multiple patterns simultaneously. (This would require multiple steps given a conventional, binary CNN.) Also, we demonstrate how tunneling field effect transistors (TFETs) can be used to form circuits capable of performing similar tasks. With this approach, more “exotic” device I-V characteristics are not required - which should be an asset when considering issues such as cell-to-cell mismatch, etc. As a case study, we present a CNN-cell design that employs TFET-based circuitry to realize ternary outputs. We then illustrate how this hardware could be employed to efficiently solve a tactile sensing problem. The total number of computation steps as well as the required hardware could be reduced significantly when compared to an approach based on a conventional CNN.
Keywords :
CMOS integrated circuits; cellular neural nets; electronic engineering computing; field effect transistors; graphene; negative resistance; tunnel transistors; CMOS devices; I-V characteristics; NDR; TFETs; analog processor; binary CNN; cellular neural network; exotic device; graphene transistors; multiple steep current growth regions; negative differential resistance; nonbinary outputs; nonvon Neumann architectures; steep-slope transistors; tactile sensing problem; ternary outputs; tunneling field effect transistors; Computer architecture; Graphene; Hardware; Performance evaluation; Resistance; Sensors; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
Conference_Location :
Dresden
Type :
conf
DOI :
10.7873/DATE.2014.150
Filename :
6800351
Link To Document :
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