DocumentCode
129126
Title
Using MaxBMC for Pareto-optimal circuit initialization
Author
Reimer, S. ; Sauer, Matthias ; Schubert, Thomas ; Becker, B.
Author_Institution
Inst. for Comput. Sci., Albert-Ludwigs-Univ. Freiburg, Freiburg, Germany
fYear
2014
fDate
24-28 March 2014
Firstpage
1
Lastpage
6
Abstract
In this paper we present MaxBMC, a novel formalism for solving optimization problems in sequential systems. Our approach combines techniques from symbolic SAT-based Bounded Model Checking (BMC) and incremental MaxSAT, leading to the first MaxBMC solver. In traditional BMC safety and liveness properties are validated. We extend this formalism: in case the required property is satisfied, an optimization problem is defined to maximize the quality of the reached witnesses. Further, we compare its qualities in different depths of the system, leading to Pareto-optimal solutions. We state a sound and complete algorithm that not only tackles the optimization problem but moreover verifies whether a global optimum has been identified by using a complete BMC solver as back-end. As a first reference application we present the problem of circuit initialization. Additionally, we give pointers to other tasks which can be covered by our formalism quite naturally and further demonstrate the efficiency and effectiveness of our approach.
Keywords
Pareto optimisation; formal verification; sequential circuits; Pareto-optimal solutions; back-end; circuit initialization; first MaxBMC solver; global optimum; incremental MaxSAT; optimization problems; reached witnesses; sequential systems; symbolic SAT-based bounded model checking; Encoding; Iterative methods; Model checking; Optimization; Planning; Safety; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
Conference_Location
Dresden
Type
conf
DOI
10.7873/DATE.2014.161
Filename
6800362
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