DocumentCode
1291261
Title
CMOS dynamic-RAMs approach static RAM speeds
Author
Eaton, S. Sheffield ; Allan, James D. ; Brady, Jim
Volume
1
Issue
6
fYear
1985
Firstpage
6
Lastpage
12
Abstract
The advantages of CMOS circuitry for dynamic RAM (DRAM) performance are discussed. First, static and dynamic memories are compared. Then, address multiplexing techniques for DRAMs are considered, and it is shown how CMOS circuitry allows effective use of continuously powered-up address buffers (as found in the fastest SRAMs). The overall improvement in DRAM design is illustrated by reference to the IMS2800, a CMOS 256K×1 DRAM.
Keywords
CMOS integrated circuits; integrated memory circuits; large scale integration; random-access storage; CNOS dynamic-RAMs; DRAM design; IMS2800; address multiplexing techniques; powered-up address buffers; speeds; CMOS integrated circuits; Clocks; MOS devices; Memory management; Random access memory; Sensors; Transistors;
fLanguage
English
Journal_Title
Circuits and Devices Magazine, IEEE
Publisher
ieee
ISSN
8755-3996
Type
jour
DOI
10.1109/MCD.1985.6311741
Filename
6311741
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