DocumentCode
1291268
Title
The Deal fast-surface states are probably deep-level impurities in the semiconductor
Author
Kump, Herbert J. ; Bernstein, Joseph B.
Author_Institution
Dept. of Electr. Eng., New Haven Univ., West Haven, CT, USA
Volume
1
Issue
6
fYear
1985
Firstpage
17
Lastpage
22
Abstract
A comparison is made between the widely held model that surface states are states that lie at the Si-SiO2 interface (e.g. dangling bonds) and a model based on deep levels (heavy metals) in the semiconductor. It is shown that calculations based on the two models measure the same quantity but that a model based on dangling bonds is inconsistent with an observed dependence on oxide thickness. Deep-level impurities introduced during or after oxide growth, however, are expected to show a dependence on oxide thickness. Furthermore, the onset of the surface states is in agreement with that known for copper at 0.52 eV as measured from the valence band edge.
Keywords
deep levels; elemental semiconductors; semiconductor-insulator boundaries; silicon; silicon compounds; surface electron states; Deal fast-surface states; Si-SiO2 interface; deep-level impurities; oxide thickness; semiconductor; valence band edge; Capacitance-voltage characteristics; Doping; Interface states; MOS capacitors; Photonic band gap; Semiconductor device measurement; Semiconductor device modeling;
fLanguage
English
Journal_Title
Circuits and Devices Magazine, IEEE
Publisher
ieee
ISSN
8755-3996
Type
jour
DOI
10.1109/MCD.1985.6311743
Filename
6311743
Link To Document