DocumentCode :
1291445
Title :
A High Gain, High Power K-Band Frequency Doubler in 0.18 
CMOS Process
Author :
Chen, Jung-Hau ; Wang, Huei
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
20
Issue :
9
fYear :
2010
Firstpage :
522
Lastpage :
524
Abstract :
A K-band frequency doubler with a current-reuse technique implemented using 0.18 μm CMOS process is presented in this letter. This frequency doubler exhibits a high conversion gain of -0.5 ~ -4.5 dB from 18 to 26 GHz with 0 dBm input drive power, and good fundamental rejection of 30 to 50 dB. The dc power consumption is 18.2 to 20.8 mW, and the chip size is 0.54 × 0.53 mm2. To the author´s knowledge, this frequency doubler achieves the highest conversion gain and output power among all K-band CMOS frequency doublers to date.
Keywords :
CMOS integrated circuits; MMIC frequency convertors; frequency multipliers; CMOS process; DC power consumption; K-band CMOS frequency doublers; current-reuse technique; frequency 18 GHz to 26 GHz; gain -0.5 dB to -4.5 dB; high gain high power K-band frequency doubler; power 18.2 mW to 20.8 mW; size 0.18 mum; Bandwidth; CMOS integrated circuits; CMOS process; CMOS technology; Energy consumption; Frequency conversion; Frequency measurement; Gain; Harmonic analysis; K-band; Power generation; Power harmonic filters; Silicon on insulator technology; Wireless communication; CMOS; K-band frequency doubler; current-reuse;
fLanguage :
English
Journal_Title :
Microwave and Wireless Components Letters, IEEE
Publisher :
ieee
ISSN :
1531-1309
Type :
jour
DOI :
10.1109/LMWC.2010.2057412
Filename :
5545482
Link To Document :
