DocumentCode
129147
Title
Accelerating graph computation with racetrack memory and pointer-assisted graph representation
Author
Eunhyuk Park ; Sungjoo Yoo ; Sunggu Lee ; Li, Huaqing
Author_Institution
Embedded Syst. Archit. Lab., POSTECH, Pohang, South Korea
fYear
2014
fDate
24-28 March 2014
Firstpage
1
Lastpage
4
Abstract
The poor performance of NAND Flash memory, such as long access latency and large granularity access, is the major bottleneck of graph processing. This paper proposes an intelligent storage for graph processing which is based on fast and low cost racetrack memory and a pointer-assisted graph representation. Our experiments show that the proposed intelligent storage based on racetrack memory reduces total processing time of three representative graph computations by 40.2%~86.9% compared to the graph processing, GraphChi, which exploits sequential accesses based on normal NAND Flash memory-based SSD. Faster execution also reduces energy consumption by 39.6%~90.0%. The in-storage processing capability gives additional 10.5%~16.4% performance improvements and 12.0%~14.4% reduction of energy consumption.
Keywords
NAND circuits; energy consumption; flash memories; graph theory; GraphChi processing; NAND flash memory; accelerating graph computation; energy consumption; graph processing; in-storage processing; intelligent storage; large granularity access; long access latency; pointer-assisted graph representation; racetrack memory; Arrays; Energy consumption; Flash memories; Magnetic tunneling; Memory management; Process control; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
Conference_Location
Dresden
Type
conf
DOI
10.7873/DATE.2014.172
Filename
6800373
Link To Document