DocumentCode
1292527
Title
Analysis of floating point roundoff errors using dummy multiplier coefficient sensitivities
Author
Zeng, Bing ; Neuvo, Yrjö
Author_Institution
Signal Process. Lab., Tampere Univ. of Technol., Finland
Volume
38
Issue
6
fYear
1991
fDate
6/1/1991 12:00:00 AM
Firstpage
590
Lastpage
601
Abstract
A simple method for analyzing roundoff errors in floating-point digital filters is presented. The method is based on the coefficient sensitivities of dummy multipliers with gains of one and connects the roundoff error analysis to coefficient sensitivity analysis. A general formulation for calculating the roundoff noise level at the output of a digital filter is presented, and a simple upper bound for roundoff error accumulation is derived. The approach makes it possible to draw some general conclusions about the floating-point roundoff noise properties of certain filter structures. The cascade, parallel, and Gray-Markel lattice structures are analyzed in detail. The interaction between coefficient sensitivity and roundoff error is discussed, and several general conclusions are drawn. Numerical examples confirm that the method is accurate enough for practical use
Keywords
cascade networks; digital filters; roundoff errors; Gray-Markel lattice structures; cascade structures; digital filters; dummy multiplier coefficient sensitivities; filter structures; floating point roundoff errors; parallel structures; roundoff error accumulation; Digital filters; Error analysis; Floating-point arithmetic; Lattices; Noise level; Roundoff errors; Sensitivity analysis; Signal processing; Signal processing algorithms; Upper bound;
fLanguage
English
Journal_Title
Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0098-4094
Type
jour
DOI
10.1109/31.81854
Filename
81854
Link To Document