DocumentCode
1292976
Title
Computer-aided design of step recovery diode frequency multipliers
Author
Zhang, Jian ; Räisänen, Antti V.
Author_Institution
Radio Lab., Helsinki Univ. of Technol., Espoo, Finland
Volume
44
Issue
12
fYear
1996
fDate
12/1/1996 12:00:00 AM
Firstpage
2612
Lastpage
2616
Abstract
Through the study of the step recovery diode (SRD) models,a method for improving the efficiency of CAD of SRD frequency multipliers is proposed. By reducing the nonlinearity of the SRD model to an appropriate extent, the simulation and optimization of SRD frequency multipliers can be carried out more easily and faster. Systematic design and optimization of an SRD frequency multiplier is described. Simulation results of this SRD frequency multiplier are compared with experimental results
Keywords
charge storage diodes; circuit CAD; circuit optimisation; frequency multipliers; microwave circuits; microwave diodes; microwave frequency convertors; CAD; frequency multipliers; nonlinearity; optimization; step recovery diode; systematic design; Algorithm design and analysis; Capacitance; Capacitors; Circuits; Design automation; Diodes; Frequency conversion; Frequency synthesizers; Mobile communication; Switches;
fLanguage
English
Journal_Title
Microwave Theory and Techniques, IEEE Transactions on
Publisher
ieee
ISSN
0018-9480
Type
jour
DOI
10.1109/22.554611
Filename
554611
Link To Document