DocumentCode
1293312
Title
High-speed single error correcting convertor for residue number processing
Author
Zhang, C.N. ; Cheng, H.D.
Author_Institution
Dept. of Comput. Sci., Regina Univ., Sask., Canada
Volume
138
Issue
4
fYear
1991
fDate
7/1/1991 12:00:00 AM
Firstpage
177
Lastpage
182
Abstract
A pipelined systolic design for residue error correction using the Chinese remainder theorem is described which has a higher throughput compared with previous methods and minimum time latency. In addition, the design has the capability of overflow detection and self-diagnostics.
Keywords
digital arithmetic; error correction codes; fault tolerant computing; pipeline processing; systolic arrays; Chinese remainder theorem; fault tolerance; overflow detection; pipelined systolic design; residue error correction; residue number processing; self-diagnosis;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings E
Publisher
iet
ISSN
0143-7062
Type
jour
Filename
81895
Link To Document