Title : 
Systolic accelerator for parametric surface modelling
         
        
            Author : 
Valenzano, A. ; Montuschi, P. ; Ciminiera, L.
         
        
            Author_Institution : 
Politecnico di Torino, Italy
         
        
        
        
        
            fDate : 
7/1/1991 12:00:00 AM
         
        
        
        
            Abstract : 
Two classes of systolic architectures are presented that are able to compute bicubical B-spline or Bezier polynomial coefficients and carry out polynomial evaluations. Using a pair of full arrays it is possible to compute all the coefficients in parallel, and to evaluate the polynomials for a given surface, as well as provide a speedup factor of more than 1500 compared with the single processor computation. An alternative solution is to partition both tasks into smaller sub-tasks so that a reduced size of the array is required. This allows a reasonable tradeoff between the speed needs and the VLSI implementation requirements to be achieved.
         
        
            Keywords : 
computer graphic equipment; computer graphics; parallel architectures; parallel programming; splines (mathematics); systolic arrays; Bezier polynomial coefficients; VLSI implementation; bicubical B-spline; parametric surface modelling; polynomial evaluations; systolic architectures;
         
        
        
            Journal_Title : 
Computers and Digital Techniques, IEE Proceedings E