• DocumentCode
    1293407
  • Title

    Comments on “revision of the buffer length derivation for a modified Ek/D/1 system by Maritsas and Hartley”

  • Author

    Suarez, R.E. ; Chang, Oscar ; Adam, V.

  • Author_Institution
    IVIC, Caracas, Venezuela
  • Issue
    1
  • fYear
    1981
  • Firstpage
    78
  • Lastpage
    78
  • Abstract
    An eight-transistor static logic gate has been designed, which generates the functions OR, NOR, AND, NAND, XOR, and XNOR of two logic variables, under the dynamic control of two programming variables. In addition to its versatility as a building block, the dynamic programmability of the gate makes it a powerful tool for the efficient design of complex digital networks.
  • Keywords
    logic design; AND; NAND; NOR; OR; XNOR; XOR; building block; complex digital networks; dynamically programmable logic gate; eight-transistor static logic gate; Approximation methods; Buffer storage; Computational modeling; Equations; Markov processes; Mathematical model; Probability;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1981.6312159
  • Filename
    6312159
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1293407