Title :
Bandwidth availability of multiple-bus multiprocessors
Author :
Das, Chita R. ; Bhuyan, Laxmi N.
Author_Institution :
Centre for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
Abstract :
The effect of failures on the performance of multiple-bus multiprocessors is considered. Bandwidth expressions for this architecture are derived for uniform and nonuniform memory references. Mathematical models are developed to compute the reliability and the performance-related bandwidth availability (BA). The results obtained for the multiple-bus interconnection are compared with those of a crossbar. The models are also extended to analyze the partial bus structure, where the memories are divided into groups and each group is connected to a subset of buses. The reliability and the BA of the multiple-bus and partial bus architectures are compared.
Keywords :
computer architecture; computer interfaces; multiprocessing systems; bandwidth availability; computer architecture; mathematical models; multiple-bus interconnection; multiple-bus multiprocessors; partial bus architectures; partial bus structure; reliability; Availability; Bandwidth; Barium; Computer architecture; Performance analysis; Program processors; Bandwidth availability; crossbar; graceful degradation; multiple bus; multiprocessor; partial bus; performance analysis; reliability;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1985.6312195
