Title :
Self-aligned implanted ground-plane fully depleted SOI MOSFET
Author :
Xiong, Weize ; Colinge, J.P.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
fDate :
11/11/1999 12:00:00 AM
Abstract :
A method for fabricating a back-gate ground plane underneath a thin-film silicon-on-insulator (SOI) MOSFET is described. It is shown by numerical simulation that the formation of the ground plane improves the subthreshold slope and short-channel characteristics of very short-channel devices
Keywords :
MOSFET; ion implantation; silicon-on-insulator; back-gate ground plane; fabrication; ion implantation; numerical simulation; self-aligned fully depleted thin film SOI MOSFET; short channel device; subthreshold slope;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19991390
