DocumentCode :
1293753
Title :
Threshold LET for SEU induced by low energy ions [in CMOS memories]
Author :
McNulty, P.J. ; Roche, Ph. ; Palau, J.M. ; Gasiot, J.
Author_Institution :
CEM2, Univ. des Sci. et Tech. du Languedoc, Montpellier, France
Volume :
46
Issue :
6
fYear :
1999
Firstpage :
1370
Lastpage :
1377
Abstract :
Simulations to determine the threshold LET as a function of the length of the ion track are consistent with there being two regions of charge collection. In the top layer which contains the depletion region all the charge generated is collected in time to upset the device. In the next layer, 10% to 20% of the charge generated is collected and contributes to upsetting the device. This second layer of partial charge collection may significantly impact the accuracy of SEU predictions involving low-energy neutrons and protons. A simple method of including this contribution in calculations is proposed.
Keywords :
CMOS memory circuits; SPICE; circuit simulation; integrated circuit modelling; ion beam effects; neutron effects; proton effects; CMOS memories; SEU; charge collection regions; depletion region; ion track length; low energy ions; low-energy neutrons; low-energy protons; partial charge collection; threshold LET; Accuracy; Astronomy; Neutrons; P-n junctions; Physics; Predictive models; Protons; Shape; Single event upset; Testing;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.819095
Filename :
819095
Link To Document :
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