DocumentCode
1294670
Title
Multiple-valued logic and optimization of programmable logic arrays
Author
Sasao, Tsutomu
Author_Institution
Fac. of Eng., Kyushu Univ., Fukuoka, Japan
Volume
21
Issue
4
fYear
1988
fDate
4/1/1988 12:00:00 AM
Firstpage
71
Lastpage
80
Abstract
Shows a method of designing programmable logic arrays (PLAs) using multiple-valued input, two-valued output functions (MVITVOFs). A MVITVOF is an extension of the two-valued logic function. An expression for a MVITVOF directly represents a multiple-output PLA with decoders. Each product of the expression corresponds to each column of the PLA, so the number of products; in the expression equals the number of columns of the PLA. The array size of the PLA is proportional to the number of products; the PLA can thus be minimized by minimizing the expression.<>
Keywords
cellular arrays; integrated logic circuits; many-valued logics; optimisation; MVITVOFs; PLAs; array size; decoders; multiple-valued input; optimization; programmable logic arrays; two-valued output functions; Calculators; Decoding; Input variables; Large scale integration; Microprocessors; Programmable logic arrays; Propagation delay; Testing; Very large scale integration; Watches;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/2.52
Filename
52
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