• DocumentCode
    1294980
  • Title

    Random testing of integrated circuits

  • Author

    David, René ; Thévenod-Fosse, Pascale

  • Author_Institution
    Inst. Nat. Polytech. de Grenoble, Saint Martin d´´Heres, France
  • Issue
    1
  • fYear
    1981
  • fDate
    3/1/1981 12:00:00 AM
  • Firstpage
    20
  • Lastpage
    25
  • Abstract
    The paper concerns fault detection by applying a random input sequence simultaneously to a circuit under test and to a reference circuit. The objective is to determine the length of the input sequence to be applied, to obtain a given detection quality (detection probability). The paper gives a summary of the results which have been obtained for combined circuits, memories, SSI, and MSI sequential circuits.
  • Keywords
    fault location; integrated circuit testing; MSI sequential circuits; SSI; combined circuits; fault detection; integrated circuit testing; random testing; Circuit faults; Combinational circuits; Flip-flops; Integrated circuits; Random access memory; Testing; Vectors;
  • fLanguage
    English
  • Journal_Title
    Instrumentation and Measurement, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9456
  • Type

    jour

  • DOI
    10.1109/TIM.1981.6312432
  • Filename
    6312432
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1294980