• DocumentCode
    1297046
  • Title

    Toward a more realistic performance evaluation of interconnection networks

  • Author

    Ligon, Walter B., III ; Ramachandran, Umakishore

  • Author_Institution
    Dept. of Comput. Sci., Clemson Univ., SC, USA
  • Volume
    8
  • Issue
    7
  • fYear
    1997
  • fDate
    7/1/1997 12:00:00 AM
  • Firstpage
    681
  • Lastpage
    694
  • Abstract
    lnterconnection network design plays a central role in the design of parallel systems. Most of the previous research has evaluated the performance of interconnection networks in isolation. In this study, we investigate the relationship between application program characteristics and interconnection network performance using an execution driven simulation test bed: the Reconfigurable Architecture Workbench (RAW). We simulate five topological configurations of a k-ary n-cube interconnect and four different network link models for a 4,096 node SIMD machine, and quantify the impact of the network on two application programs. We provide experimental evidence that such “in-context” simulation provides a better view of the impact of network design variables on system performance. We show that recent results, indicating that low-dimensional designs provide better ICN performance, ignore application requirements that may favor high-dimensional designs. Furthermore, applications that would appear to favor low dimensional designs may not, in fact, be significantly impacted by the network´s dimensionality. We experimentally test the results of published performance models comparing the use of a synthetic load to that of a load generated by a typical application program
  • Keywords
    digital simulation; multiprocessor interconnection networks; performance evaluation; reconfigurable architectures; Reconfigurable Architecture Workbench; application program characteristics; execution driven; interconnection network performance; interconnection networks; parallel systems; performance evaluation; performance models; simulation test bed; Bandwidth; Computational modeling; Costs; Delay; Multiprocessor interconnection networks; Parallel machines; Reconfigurable architectures; Switches; System performance; Testing;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/71.598344
  • Filename
    598344