Annealing of Heavy-Ion Induced Floating Gate Errors: LET and Feature Size Dependence

Author

Bagatin, Marta ; Gerardin, Simone ; Cellere, Giorgio ; Paccagnella, Alessandro ; Visconti, Angelo ; Beltrami, Silvia ; Bonanomi, Mauro ; Harboe-Sørensen, Reno

Author_Institution

Dipt. di Ing. dell´´Inf., Univ. di Padova, Padova, Italy

Volume

57

Issue

4

fYear

2010

Firstpage

1835

Lastpage

1841

Abstract

We discuss the room temperature annealing of Floating Gate errors in Flash memories with NAND and NOR architecture after heavy-ion irradiation. We present the evolution of raw bit errors as a function of time after the exposure, examining the annealing dependence on the particle LET, cell feature size, and, for Multi Level Cells, on the program level. The results are explained based on the statistical properties of the cell threshold voltage distributions before and after heavy-ion strikes.

Keywords

annealing; flash memories; ion beam effects; NAND architecture; NOR architecture; cell feature size; cell threshold voltage distribution; flash memories; floating gate errors; heavy-ion irradiation; multilevel cells; program level; raw bit errors; room-temperature annealing; Annealing; Charge carrier processes; Circuits; Computer architecture; Digital audio players; Digital cameras; Error correction codes; Flash memory; Ionizing radiation; Ions; Microprocessors; Nonvolatile memory; Radiation effects; Temperature dependence; Threshold voltage; Annealing; flash memories; heavy ions; radiation effects;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2010.2045131

Filename

5550300