DocumentCode
1297131
Title
A test-pattern-generation algorithm for sequential circuits
Author
Auth, Elisabeth ; Schulz, Michael H.
Author_Institution
Tech. Univ. of Munich, Germany
Volume
8
Issue
2
fYear
1991
fDate
6/1/1991 12:00:00 AM
Firstpage
72
Lastpage
85
Abstract
A deterministic test-pattern-generation algorithm for synchronous sequential circuits is presented. The algorithm, called Essential, takes advantage of a procedure for learning global implications. It uses static and dynamic dominance relationships among signals, the concept of the potential propagation path, and intelligent heuristics to guide and accelerate the decision-making process for deterministic automatic test pattern generation (ATPG). Essential is based on the well-known method of reverse time processing, but it applies forward processing within time frames to avoid disadvantageous a priori determination of a path to be sensitized or of a primary output to which the fault effects must be propagated. It is designed to exploit fully the sophisticated techniques used for combinational circuits in the Socrates ATPG system. Experimental results for sequential ATPG obtained with Essential (implemented in C on a Sequent Symmetry computer) are reported.<>
Keywords
combinatorial circuits; logic testing; sequential circuits; C; Essential; Sequent Symmetry computer; a priori determination; combinational circuits; deterministic automatic test pattern generation; intelligent heuristics; propagation path; reverse time processing; synchronous sequential circuits; test-pattern-generation algorithm; Acceleration; Automatic test pattern generation; Automatic testing; Circuit analysis; Circuit faults; Circuit testing; IEEE Computer Society Press; Sequential analysis; Sequential circuits; Signal processing;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/54.82040
Filename
82040
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