Estimation for maximum instantaneous current through supply lines for CMOS circuits

We present new techniques for estimating the maximum instantaneous current through the power supply lines for CMOS circuits. We investigate four different approaches: (1) timed-ATPG-based approach; (2) probability-based approach; (3) genetic algorithm-based approach; and (4) integer linear programming (ILP) approach. The first three approaches produce a tight lower bound on the maximum current. The ILP-based approach produces the exact solutions for small circuits, and tight upper bounds of the solutions for large circuits. Our experimental results show that the upper bounds produced by the ILP approach combined with the lower bounds produced by the other three approaches confine the exact solution for the maximum instantaneous current to a small range.