• DocumentCode
    1298727
  • Title

    A PEEC with a new capacitance model for circuit simulation of interconnects and packaging structures

  • Author

    Cao, Yi ; Li, Zheng-Fan ; Mao, Ji-Feng ; Mao, Jun-Fa

  • Author_Institution
    Dept. of Electron. Eng., Shanghai Jiaotong Univ., China
  • Volume
    48
  • Issue
    2
  • fYear
    2000
  • fDate
    2/1/2000 12:00:00 AM
  • Firstpage
    281
  • Lastpage
    287
  • Abstract
    In this paper, a modified partial-element equivalent-circuit (PEEC) model, i.e., (Lp, A&oarr;, R, εf)PEEC, is introduced. In such a model, no equivalent circuit, but a set of state equations for the variables representing the function of circuit, are given to model a three-dimensional structure. Unlike the original (Lp, P, R, εf) PEEC model, the definition of vector potential A&oarr; with integral form and the Lorentz gauge are used in expanding the basic integral equation instead of the definition of the scalar potential φ with integral form. This can directly lead to the state equations, and the capacitance extraction can be replaced by the calculation of the divergence of A&oarr;, which is analytical. For analysis of most interconnect and packaging problems, generally containing complex dielectric structures, the new model can save a large part of computing time. The validity of the new model is verified by the analysis in time and frequency domain with several examples of typical interconnect and packaging structures, and the results with this new method agree well with those of other papers
  • Keywords
    capacitance; circuit simulation; integral equations; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; 3D structure; Lorentz gauge; capacitance extraction; capacitance model; circuit simulation; complex dielectric structures; integral equation expansion; integral form; interconnect analysis; modified PEEC model; packaging structures; partial-element equivalent-circuit model; state equations; three-dimensional structure; Capacitance; Circuit simulation; Equivalent circuits; High speed integrated circuits; Integral equations; Integrated circuit interconnections; Integrated circuit modeling; Integrated circuit packaging; Magnetic analysis; Solid modeling;
  • fLanguage
    English
  • Journal_Title
    Microwave Theory and Techniques, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9480
  • Type

    jour

  • DOI
    10.1109/22.821777
  • Filename
    821777