DocumentCode
1299602
Title
Time Multiplexed Triple Modular Redundancy for Single Event Upset Mitigation
Author
She, Xiaoxuan ; McElvain, K.S.
Author_Institution
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Volume
56
Issue
4
fYear
2009
Firstpage
2443
Lastpage
2448
Abstract
This paper presents a time-multiplexed triple modular redundancy (TMR) scheme which detects and corrects single event upsets (SEUs) through time-multiplexed resource sharing. The time-multiplexed TMR method provides self-protection against SEUs in both computation logic and voting logic. Experimental results demonstrate that the proposed scheme can reduce area and power significantly in the TMR designs of single-channel circuits and multi-channel circuits.
Keywords
application specific integrated circuits; field programmable gate arrays; logic circuits; nuclear electronics; position sensitive particle detectors; ASIC; FPGA; SEU; TMR; computation logic; multichannel circuits; single event upsets; single-channel circuits; time-multiplexed triple modular redundancy; Application specific integrated circuits; Delay; Event detection; Field programmable gate arrays; Logic; Payloads; Redundancy; Single event transient; Single event upset; Voting; Single event upset (SEU); time-multiplexed; triple modular redundancy (TMR);
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2009.2021656
Filename
5204663
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