• DocumentCode
    1299759
  • Title

    Total-Dose Worst-Case Test Vectors for Leakage Current Failure Induced in Sequential Circuits of Cell-Based ASICs

  • Author

    Abou-Auf, Ahmed A.

  • Author_Institution
    Electron. Eng. Dept., American Univ. in Cairo, Cairo, Egypt
  • Volume
    56
  • Issue
    4
  • fYear
    2009
  • Firstpage
    2189
  • Lastpage
    2197
  • Abstract
    We developed a methodology for identifying worst-case test vectors for leakage current failure induced in sequential circuits of cell-based ASICs induced by total-dose. This methodology is independent on the design tools and the process technology.
  • Keywords
    CMOS logic circuits; application specific integrated circuits; dosimeters; leakage currents; logic gates; CMOS; cell-based ASICs; leakage current; sequential circuits; total-dose; worst-case test vectors; Application specific integrated circuits; CMOS logic circuits; Circuit faults; Circuit testing; Leakage current; Libraries; MOSFETs; Semiconductor device modeling; Sequential analysis; Sequential circuits; CMOS; leakage current; test vectors; total dose; worst-case;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.2009.2019275
  • Filename
    5204688
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1299759