• DocumentCode
    1300105
  • Title

    TAIR: testability analysis by implication reasoning

  • Author

    Chang, Shih-Chieh ; Jone, Wen-Ben ; Chang, Shi-Sen

  • Author_Institution
    Dept. of Comput. Sci. & Inf., Nat. Chung Cheng Univ., Chiyai, Taiwan
  • Volume
    19
  • Issue
    1
  • fYear
    2000
  • fDate
    1/1/2000 12:00:00 AM
  • Firstpage
    152
  • Lastpage
    160
  • Abstract
    To predict the difficulty of testing a wire stuck-at fault, testability analysis algorithms provide an estimated testability value by computing controllability and observability. In most common previous work such as COP and SCOAP, signal correlation between controllability and observability is not well handled. As a result, the estimated values can be quite inaccurate, On the other hand, some previous work can take into account signal correlation but may require more CPU time. This paper discusses an efficient method for testability analysis improvement. Our algorithm starts with results obtained from conventional testability analysis such as COP. For each stuck- at fault, we gradually refine these results by recursively applying some simple signal correlation rules. Experimental results show that, with reasonable run-time overhead, significant improvement for testability analysis can be achieved
  • Keywords
    controllability; correlation methods; integrated circuit testing; observability; COP; SCOAP; TAIR algorithm; controllability; implication reasoning; integrated circuit; observability; signal correlation; testability analysis; wire stuck-at fault; Algorithm design and analysis; Central Processing Unit; Circuit faults; Circuit testing; Controllability; Observability; Probability; Runtime; Signal analysis; Wire;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.822627
  • Filename
    822627